/*
 * File: NVM.h
 *
 * Code generated for Simulink model 'NVM'.
 *
 * Model version                  : 3.288
 * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
 * C/C++ source code generated on : Thu Jan  5 16:57:51 2023
 *
 * Target selection: ert.tlc
 * Embedded hardware selection: NXP->Cortex-M4
 * Code generation objective: MISRA C:2012 guidelines
 * Validation result: Not run
 */

#ifndef RTW_HEADER_NVM_h_
#define RTW_HEADER_NVM_h_
#include <stddef.h>
#ifndef NVM_COMMON_INCLUDES_
#define NVM_COMMON_INCLUDES_
#include "rtwtypes.h"
#endif                                 /* NVM_COMMON_INCLUDES_ */

#include "NVM_types.h"
#include "includes.h"

/* Macros for accessing real-time model data structure */
#ifndef rtmGetErrorStatus
#define rtmGetErrorStatus(rtm)         ((rtm)->errorStatus)
#endif

#ifndef rtmSetErrorStatus
#define rtmSetErrorStatus(rtm, val)    ((rtm)->errorStatus = (val))
#endif

/* Block signals (default storage) */
typedef struct
{
    uint32_T batLife;                  /* '<S5>/DataDeal' */
    uint32_T nvm_ah_sigDsgCap_l;       /* '<S5>/DataDeal' */
    uint32_T nvm_min_noChgTime_d;      /* '<S5>/DataDeal' */
    uint32_T nvm_min_sleepTime_k;      /* '<S5>/DataDeal' */
    uint32_T nvm_ah_TatolAllChg_e;     /* '<S5>/ToTalAhUpData' */
    uint32_T nvm_ah_TatolDsg_l;        /* '<S5>/ToTalAhUpData' */
    uint32_T nvm_kw_TatolAllChg_g;     /* '<S5>/ToTalAhUpData' */
    uint32_T nvm_kw_TatolDsg_f;        /* '<S5>/ToTalAhUpData' */
    uint32_T nvm_ah_TotalChg;          /* '<S5>/ToTalAhUpData' */
    uint32_T nvm_ah_TatolBack_m;       /* '<S5>/ToTalAhUpData' */
    uint32_T nvm_kw_TatolBack_l;       /* '<S5>/ToTalAhUpData' */
    uint32_T nvm_kw_TotalChg_b;        /* '<S5>/ToTalAhUpData' */
    uint32_T Divide4;                  /* '<S16>/Divide4' */
    uint32_T Divide4_f;                /* '<S11>/Divide4' */
    uint32_T Divide4_b;                /* '<S10>/Divide4' */
    uint32_T Divide4_l;                /* '<S9>/Divide4' */
    uint32_T FunctionCaller_l[16];     /* '<S7>/Function Caller' */
    uint32_T nvm_arr_RTCStartTag[9];   /* '<S7>/RTCStart' */
    uint32_T eep_ah_sigDsgCap;         /* '<S7>/RTCStart' */
    uint32_T eep_min_noChgTime;        /* '<S7>/RTCStart' */
    real32_T DisAhMs_k;                /* '<S16>/Divide' */
    real32_T ChgAhMs;                  /* '<S11>/Divide' */
    real32_T ChgAhMs_i;                /* '<S10>/Divide' */
    real32_T ChgAhMs_n;                /* '<S9>/Divide' */
}
B_NVM_T;

/* Block states (default storage) for system '<Root>' */
typedef struct
{
    uint32_T DsgIntegOld;              /* '<S16>/Unit Delay' */
    uint32_T DsgIntegOld_f;            /* '<S16>/Unit Delay1' */
    uint32_T ChgIntegOld;              /* '<S11>/Unit Delay' */
    uint32_T DsgIntegOld_c;            /* '<S11>/Unit Delay1' */
    uint32_T ChgIntegOld_e;            /* '<S10>/Unit Delay' */
    uint32_T DsgIntegOld_h;            /* '<S10>/Unit Delay1' */
    uint32_T ChgIntegOld_a;            /* '<S9>/Unit Delay' */
    uint32_T DsgIntegOld_e;            /* '<S9>/Unit Delay1' */
    real32_T LastHisDsgAh;             /* '<S5>/ToTalAhUpData' */
    real32_T LastHisChgAh;             /* '<S5>/ToTalAhUpData' */
    real32_T CpCalcnDchg;              /* '<S5>/ToTalAhUpData' */
    real32_T CpCalcnBack;              /* '<S5>/ToTalAhUpData' */
    real32_T LastCpCalcnDCChg;         /* '<S5>/ToTalAhUpData' */
    real32_T LastCpCalcnBack;          /* '<S5>/ToTalAhUpData' */
    int32_T histroyTime;               /* '<S5>/DataDeal' */
    uint32_T startNoChgTime;           /* '<S5>/DataDeal' */
    uint32_T startSigDsgCap;           /* '<S5>/DataDeal' */
    uint32_T oldChgAllAh;              /* '<S5>/DataDeal' */
    uint32_T TatolDhgEny;              /* '<S5>/ToTalAhUpData' */
    uint32_T LastChgAhEny;             /* '<S5>/ToTalAhUpData' */
    uint32_T LastDisAhEny;             /* '<S5>/ToTalAhUpData' */
    uint32_T BackEny;                  /* '<S5>/ToTalAhUpData' */
    uint32_T LastBackEny;              /* '<S5>/ToTalAhUpData' */
    uint32_T LastDCChgEny;             /* '<S5>/ToTalAhUpData' */
    uint32_T CpCalcnAllChrg;           /* '<S5>/ToTalAhUpData' */
    uint32_T TatolAllChgEny;           /* '<S5>/ToTalAhUpData' */
    uint32_T CpCalcnChg;               /* '<S5>/ToTalAhUpData' */
    uint32_T ChgEny;                   /* '<S5>/ToTalAhUpData' */
    uint16_T AhCntr;                   /* '<S5>/Time_5S_Tigger' */
    uint16_T AhCntr_l;                 /* '<S5>/Time_1S_Tigger' */
    uint8_T firstflg;                  /* '<S5>/DataDeal' */
    uint8_T fstflg;                    /* '<S5>/DataDeal' */
    uint8_T is_active_c2_NVM;          /* '<S5>/ToTalAhUpData' */
    uint8_T is_c2_NVM;                 /* '<S5>/ToTalAhUpData' */
}
DW_NVM_T;

/* Real-time Model Data Structure */
struct tag_RTM_NVM_T
{
    const char_T * volatile errorStatus;
};

/* Block signals (default storage) */
extern B_NVM_T NVM_B;

/* Block states (default storage) */
extern DW_NVM_T NVM_DW;

/* Model entry point functions */
extern void NVM_initialize(void);

/* Exported entry point function */
extern void TASK_Rte_NvmRead(void);

/* Exported entry point function */
extern void TASK_10ms_AhCal(void);

/* Exported entry point function */
extern void TASK_Rte_NvmWrite(void);

/* Exported entry point function */
extern void TASK_ReadRTC(void);

/* Real-time Model object */
extern RT_MODEL_NVM_T *const NVM_M;

/* Exported data declaration */

/* Declaration for custom storage class: ExportToFile */
extern real32_T nvm_ah_Chg;            /* '<S5>/Product1' */
extern real32_T nvm_ah_Dsg;            /* '<S5>/Product' */
extern uint32_T nvm_ah_TatolAllChg;    /* '<S5>/ToTalAhUpData' */
extern uint32_T nvm_ah_TatolBack;      /* '<S5>/ToTalAhUpData' */
extern uint32_T nvm_ah_TatolChg;       /* '<S5>/ToTalAhUpData' */
extern uint32_T nvm_ah_TatolDsg;       /* '<S5>/ToTalAhUpData' */
extern uint32_T nvm_ah_sigDsgCap;      /* '<S5>/DataDeal' */
extern uint32_T nvm_kw_TatolAllChg;    /* '<S5>/ToTalAhUpData' */
extern uint32_T nvm_kw_TatolBack;      /* '<S5>/ToTalAhUpData' */
extern uint32_T nvm_kw_TatolDsg;       /* '<S5>/ToTalAhUpData' */
extern uint32_T nvm_kw_TotalChg;       /* '<S5>/ToTalAhUpData' */
extern uint32_T nvm_min_batLife;       /* '<S5>/DataDeal' */
extern uint32_T nvm_min_noChgTime;     /* '<S5>/DataDeal' */
extern uint32_T nvm_min_sleepTime;     /* '<S5>/DataDeal' */
extern RTC_TIME_STRUCT nvm_stu_RTCTag; /* '<S7>/Bus Creator' */
extern RTC_TIME_STRUCT nvm_stu_ReadRTCTime;/* '<S6>/Hex2Bcd' */

/*-
 * The generated code includes comments that allow you to trace directly
 * back to the appropriate location in the model.  The basic format
 * is <system>/block_name, where system is the system number (uniquely
 * assigned by Simulink) and block_name is the name of the block.
 *
 * Use the MATLAB hilite_system command to trace the generated code back
 * to the model.  For example,
 *
 * hilite_system('<S3>')    - opens system 3
 * hilite_system('<S3>/Kp') - opens and selects block Kp which resides in S3
 *
 * Here is the system hierarchy for this model
 *
 * '<Root>' : 'NVM'
 * '<S1>'   : 'NVM/DocBlock'
 * '<S2>'   : 'NVM/Interface'
 * '<S3>'   : 'NVM/LoadEnvironment1'
 * '<S4>'   : 'NVM/Model Info'
 * '<S5>'   : 'NVM/Interface/AhUpData'
 * '<S6>'   : 'NVM/Interface/AhUpData1'
 * '<S7>'   : 'NVM/Interface/ReadNvm'
 * '<S8>'   : 'NVM/Interface/WriteNvm'
 * '<S9>'   : 'NVM/Interface/AhUpData/BackAhCal'
 * '<S10>'  : 'NVM/Interface/AhUpData/ChgAhAllCal'
 * '<S11>'  : 'NVM/Interface/AhUpData/ChgAhCal'
 * '<S12>'  : 'NVM/Interface/AhUpData/Compare To Constant1'
 * '<S13>'  : 'NVM/Interface/AhUpData/Compare To Constant10'
 * '<S14>'  : 'NVM/Interface/AhUpData/Compare To Constant11'
 * '<S15>'  : 'NVM/Interface/AhUpData/DataDeal'
 * '<S16>'  : 'NVM/Interface/AhUpData/DsgAhCal'
 * '<S17>'  : 'NVM/Interface/AhUpData/HighVoltConverter2'
 * '<S18>'  : 'NVM/Interface/AhUpData/Time_1S_Tigger'
 * '<S19>'  : 'NVM/Interface/AhUpData/Time_5S_Tigger'
 * '<S20>'  : 'NVM/Interface/AhUpData/ToTalAhUpData'
 * '<S21>'  : 'NVM/Interface/AhUpData1/Hex2Bcd'
 * '<S22>'  : 'NVM/Interface/ReadNvm/RTCStart'
 */

/*-
 * Requirements for '<Root>': NVM
 */
#endif                                 /* RTW_HEADER_NVM_h_ */

/*
 * File trailer for generated code.
 *
 * [EOF]
 */
